In this paper we propose a model for the generation of error patterns at the output of a turbo decoder. One of the advantages of this model is that it can be used to generate the error sequence with little effort. Thus, it provides a basis for designing hybrid concatenated codes (HCCs) employing the turbo code as inner code. These coding schemes combine the features of parallel and serially concatenated codes and thus offer more freedom in code design. It has been demonstrated, in fact, that HCCs can perform closer to capacity than serially concatenated codes while still maintaining a minimum distance that grows linearly with block length. In particular, small memory-one component encoders are sufficient to yield asymptotically good code ensembles for such schemes. The resulting codes provide low complexity encoding and decoding and, in many cases, can be decoded using relatively few iterations.
