We perform a comprehensive comparison of FinFETs,
stacked nanowires (stacked NWs), circular and square
gate-all-around (GAA) -FETs with same footprint, by
using an in-house deterministic BTE solver accounting for
quantum confinement, a wide set of scattering mechanisms
and self-heating. We show that an increase in surface
roughness (SR) can frustrate the improvement in on
current, I, that for high-quality interfaces we observe in
stacked NWs compared to FinFETs. Simulations suggest
that SR also influences whether or not In0.53Ga0.47As can
provide better I than strained silicon (sSi).
