This work presents a systematic design study of nanowire
Tunnel-FETs at LG=17nm employing a 3D Poisson-NEGF
solver based on a 8×8 k·p Hamiltonian and including phonon
scattering. In particular: (a) we revisit the design of GaSb-
InAs based hetero-junction tunnel-FETs showing that this
system is unlikely to yield a broken bangap profile at the
very narrow features necessary for a good sub-VT slope
value; (b) we propose new design options for hetero-junction
tunnel-FETs, relying on the use of strain and of a graded
molar fraction (xM) in Alx
MGa(1−xM)Sb, which improve
remarkably on current preserving optimal sub-VT slopes;
(c) we show that interface defects can frustrate any design
strategy aiming at sub-VT slope values below 60mV/dec.
