Electromagnetic Susceptibility Analysis on a Digital Pulse Width Modulator for SMPSs

In this paper, a digital pulse width modulator (DPWM) is analyzed from the point of view of susceptibility to radio-frequency interference (RFI). The chosen DPWM architecture is based on the hybrid delay-line/counter scheme commonly used in the digital control of switched-mode power supplies (SMPSs). This paper focuses on the DPWM performance degradation in the presence of electromagnetic interference (EMI), and for this purpose a DPWM with time resolution down to 350 ps has been designed and manufactured in a standard 0.35-μm complementary metaloxide semiconductor technology. Measurements and analytical analyses are presented for both EMI effects on the internal generated clock signal and on the PWM duty-cycle precision. The immunity degradation mechanisms are investigated by means of an analytical approach, demonstrating that the PWM susceptibility is more strictly related to its functional design rather than to the implemented topology. The effects of clock and duty-cycle jitter induced by RFIs are finally verified using a simulation model on a digitally controlled buck converter, highlighting the importance of such issue on steady-state performances of SMPSs.