We present for the first time high performance Nanowire (NW)
Tunnel FETs (TFET) obtained with a CMOS-compatible process
flow featuring compressively strained Si1-xGex (x=0, 0.2, 0.25)
nanowires, Si0.7Ge0.3 Source and Drain and High-K/Metal gate.
Nanowire architecture strongly improves electrostatics, while low
bandgap channel (SiGe) provides increased band-to-band tunnel
(BTBT) current to tackle low ON current challenges. We analyse the
impact of these improvements on TFETs and compare them to
MOSFET ones. Nanowire width scaling effects on TFET devices are
also investigated, showing a W-3 dependence of ON current (ION) per
wire. The fabricated devices exhibit higher ION than any previously
reported TFET, with values up to 760μA/μm and average
subthreshold slopes (SS) of less than 80mV/dec.
