Time optimal, parameters-insensitive digital controller for DC-DC buck converters

In this paper a digital control approach is investigated for time-optimal load step response of DC-DC synchronous buck converters intended for point-of-load applications employing low-ESR ceramic output capacitors. Unlike previously reported approaches, the proposed technique is insensitive to the power stage parameters, as its operation does not rely on the knowledge of the output filter inductance or capacitance. The time-optimal response is achieved through a single on/off switching action undertaken as soon as a load transient is detected. An asynchronous A/D converter has been employed, realized in a standard 0.35 mum CMOS process. The A/D converter quantizes the output voltage and triggers a nonlinear, event-based digital controller whenever a quantization level transition is detected. Time-optimal response is based solely on output voltage measurements and on the knowledge of the steady-state duty cycle, a number easily available within the digital controller. Effectiveness and properties of the proposed robust time-optimal approach are validated through both computer simulations and experimental tests on a synchronous buck converter prototype and a VHDL implementation of the control algorithm on an FPGA device.