We present a theoretical study of the trap-charge-induced variability of threshold voltage in silicon-nanowire FETs. By exploiting full-quantum 3-D simulations, we determine the transfer characteristics in the presence of discrete trap charges at different positions in the gate-stack volume, and hence, we compute the probability density function of these randomly distributed impurities. Assuming a Poisson distribution for the trap charge numbers, we estimate the statistics of the threshold voltage shift induced by such charged defects and evaluate the mean value and standard deviation of the threshold voltage for typical trap density values.
